CV

This is my CV

Contact Information

Name Aditya B Pattavardhanam
Professional Title ECE Undergraduate | Analog & Mixed-Signal IC Design
Email aditya.pattavardhanam@gmail.com

Professional Summary

ECE undergraduate who loves analog and mixed-signal IC design, with hands-on experience spanning TSMC 180nm and 14nm FinFET characterization in Cadence Virtuoso, full-custom layout in TSMC 180nm and Sky130, and a genuine love for building things – extending into avionics power systems and PCB design.

Experience

  • 2026 - 2026

    Bengaluru, India

    Trainee, Cohort 8 (Grade II scholarship)
    Samsung India Semiconductor Workforce Development Program, IISc
    • TCAD-based semiconductor device simulation using Synopsys Sentaurus; covers process, structure, and electrical characterization workflows
  • 2026 - 2026

    Chennai, India

    Summer Research Fellow (ICS group, Prof. Nagendra Krishnapura)
    IIT Madras, Dept. of Electrical Engineering
    • Characterized CMOS inverters in TSMC 180nm (Cadence Virtuoso/Spectre) across 20 PVT corners; extracted gain, bandwidth, and switching metrics
    • Executed full-custom layout (Layout XL), Calibre DRC/LVS, and post-layout parasitic extraction (PEX), validating performance across TT/FF/SS corners on schematic and extracted views
    • FinFET benchmarking study: designed and simulated ring oscillators, FO4 inverters, and opamps using 14nm High Performance PTM models; compared propagation delay and drive strength across technology nodes from 7nm to 20nm
    • Designed a custom 2-layer breakout PCB for a taped-out chip using Cadence Allegro X Design Platform
  • 2023 - present

    Bengaluru, India

    Coordinator Design & Prototyping | Co-Lead Product Development | VLSI group (Analog)
    MARVEL UVCE, R&D Lab
    • Mentored student electronics designs involving PCB, FPGA, and signal processing
    • Co-leading product development cohort focusing on end-to-end hardware solutions
    • Co-developed the VLSI syllabus to teach the next generation of VLSI enthusiasts, with a personal focus on analog VLSI
  • 2025 - 2026

    Bengaluru, India

    Research Intern – Team Lead (Avionics)
    IISc, Dept. of Aerospace Engineering (Project Urdhyuth)
    Non-Linear Multifunctional Composites Analysis and Design Lab. Guided by Prof. Dineshkumar Harursampath (IISc) and Prof. Ramesh Gupta (NITTR-Bhopal).
    • Developed a Power Management System in MATLAB involving load modeling, protection logic, and subsystem interface definition for an eVTOL platform
    • Co-designed Li-Ion NMC battery architecture and implemented Battery Management System functions for monitoring, balancing, and safety protection
  • 2024 - present

    Bengaluru, India

    Podcast Editor and Host
    UVCE Graduates Association
    Edited and hosted 14 episodes from season 4 to 7 of UVCE Chronicles.
  • 2024 - 2024

    Bengaluru, India

    Representative Committee, Coordinator – Power Electronics Society (PELS)
    IEEE UVCE

Education

  • 2023 - 2027

    Bengaluru, India

    Bachelor of Technology
    University of Visvesvaraya College of Engineering (UVCE)
    Electronics & Communication Engineering
    • CGPA: 9.07/10
  • - 2023

    Bengaluru, India

    BASE PU College, Rajajinagar
    XII — Karnataka State Board
    • Score: 90.16%
  • - 2021

    Bengaluru, India

    Daffodils English School
    X — ICSE
    • Score: 91%

Projects

  • Fully Analog MPPT Controller Tapeout — SKY130A PDK (In Progress)

    All-analog perturb-and-observe MPPT controller for CubeSat applications, targeting Tiny Tapeout.

    • Chose a fully analog P&O architecture over RCC, centered on a Gilbert cell multiplier core, with sample-and-hold and StrongARM comparator blocks built for IP reuse
  • Low-Cost Open-Source Maskless Photolithography System (In Progress)

    Maskless lithography using a DLP2000 DMD as a reconfigurable UV photomask on a Creality CR-10S motion platform.

    • Coaxial focus/exposure path for live focus verification, targeting ~10 µm resolution
    • Scoping a ~20-week build across procurement, integration, calibration, and open-source documentation/release
  • HeartGuard — ECG Anomaly Detection Device

    Real-time arrhythmia detection device with custom analog front-end and wireless streaming.

    • Designed analog front-end using TI ADS1298 (8-channel, 24-bit ECG AFE) with custom signal conditioning
    • Custom 4-layer PCB in Altium integrating ADS1298, STM32F411 (Cortex-M4), and BLE module
  • Hardware-Aware Spectrum Monitoring with Jammer-like Anomaly Detection (CMOS Role)

    Passive spectrum sensing platform for real-time channel occupancy and interference analysis.

    • Transistor-level StrongARM latch comparator in Xschem/Ngspice achieving ~6–7 mV sensitivity and ~10 ns decision time
    • Validated across noise-only, signal-present, and jammer conditions; analyzed metastability, detection margins, and transition dynamics
  • Hardware Trojan Detection

    RTL-level trojan injection and side-channel detection pipeline.

    • Injected RTL-level trojans in Verilog; 70,000 cycles of fixed-seed constrained-random stimulus to detect output divergence between clean and trojan ALU variants
    • Python-based side-channel detection pipeline using switching activity signatures
  • CanSat (Can-Sized Satellite) — Power Subsystem Lead

    Dual-board avionics architecture around a 2S Li-ion pack with TPS563203 buck converters.

    • Full power budget (load analysis, battery draw with conversion losses, energy balance) with 79% margin
    • INA219-based current monitoring across all rails

Skills

Analog Design: CMOS circuit design, FinFETs, SPICE-level circuit analysis, full-custom layout
Digital Design: RTL using Verilog, FPGA, Digital Logic
Embedded & Hardware: PCB Design, Power Electronics
Tools: Cadence Virtuoso & Allegro X Design Platform, Open Source EDA analog workflows, Vivado, Altium Designer, KiCad, MATLAB
Domains: VLSI, Battery Management Systems, Power Management, Avionics
Coding Languages: SPICE, Verilog, C/C++, Java

Awards

  • 2025
    1st Place – MARVEL CTARA Hackathon 2025
    MARVEL UVCE

    Built and pitched a working hardware prototype for smart agriculture using IoT

  • 2025
    1st Place – Impetus 2025 AvionX Electrical Subsystem
    IEEE UVCE

    Designed a dynamic DC-DC power converter as the electrical subsystem for a UAV design challenge

  • 2024
    Winner – SiliconSprint Digital Design Hackathon
    IEEE NITK & RVCE

    Built the Hardware Trojan Detection project in a 24-hour hackathon

  • 2023
    1st Place – Kagada 2023 Project Track
    IEEE UVCE

    Won the project track for an original electronics build extracting electricity from railway track heat

  • 2023
    1st Place – Science Spectrum
    Christ University

    First place in an inter-collegiate science and engineering exhibition for a rescue ops and disaster management project

  • 2024
    Best Performer Award – D-P-001 Level 1
    MARVEL UVCE

    Top performer in MARVEL’s foundational design & prototyping course

Certificates

  • FPGA Design for Embedded Systems - University of Colorado Boulder / Coursera
  • Altium Designer - Altium Education
  • MARVEL UVCE Level 1 & 2 (electronics design & prototyping) - MARVEL UVCE

Interests

Music: Performing guitarist and vocalist
Sports: Table tennis enthusiast
Aviation & Space: Aviation & Space Tech